In the manufacture of integrated circuits, thin films of various materials are formed on wafers of semiconducting material, such as doped silicon. Specific selected areas of deposited films are removed to form structures and circuitry. CVD is a well known process for depositing such thin films. For example, polysilicon is deposited from silane gas, SiH.sub.4. Similarly, tungsten silicide is deposited from a mixture of gases including silane and a tungsten-bearing gas such as tungsten hexafluoride. Pure tungsten is also deposited on silicon wafers in the manufacture of integrated circuits, sometimes selectively and sometimes across the entire surface in a process known as "blanket" tungsten.
In a typical CVD process wafers are placed on supports in a chamber, the chamber is sealed and evacuated, the wafers are heated, typically by heating the wafer support, and a gas mixture is conducted into the chamber. For example, in the blanket tungsten process, tungsten hexafluoride and hydrogen are fed as reactive gases and argon may be included as a carrier gas. The tungsten hexafluoride is the source of deposited tungsten. Typically the gases are flowed continuously during processing. The temperature of a wafer to be coated is one of the variables that drives the chemical reaction to cause tungsten to be deposited. It is important to control the temperature, the relative concentration of various gases in the mixture, and such characteristics as the uniformity of flow of gas over the surface being coated, among other variables. An even thickness of a deposited layer is an important characteristic.
One of the important variables in providing a coating of uniform thickness with a CVD process is the uniformity of temperature over the surface of the wafer to be coated. The rate of deposition in a CVD process depends, among other variables, on the temperature of the wafer, so a non-uniform temperature will result in a CVD coating of non-uniform thickness.
A common arrangement in a CVD apparatus is to support a wafer against a flat surface, such as a surface on a central turret in a chamber that can be evacuated and into which CVD gases may be introduced. The turret is heated to heat the wafer. It is also known to support a wafer on a CVD chuck separate from but attached to a central turret, and to heat the chuck to heat the wafer. This arrangement allows for a lower thermal mass for the chuck and consequently a quicker response time when it is necessary to change the temperature. It is also known to mechanically press a wafer against a chuck surface at several points around the perimeter of a wafer or with a continuous ring.
In all of the cases in which a wafer is supported on a flat surface and the surface is heated to heat the wafer, even where a wafer is mechanically pressed against the surface, the wafer is not everywhere in intimate contact with the heating surface. Truly intimate contact is not within the capability of machining tolerances. The contact is at a number of points or small areas, and the rest of the wafer surface adjacent the chuck surface is close but not touching. Heat transfer from a chuck to a wafer is consequently less efficient than would be the case with intimate surface contact.
Because of the difficulty of establishing intimate contact between a wafer and a chuck surface there is usually a considerable difference between the temperature of a chuck and a wafer on the chuck. It is not unusual for the temperature difference to be more than 100 degrees Centigrade. Moreover, heat transfer at the points where the wafer actually touches the chuck is much more efficient than where it doesn't touch, so there are typically small areas on the wafer at the contact points that are hotter than the areas away from the contact points. These small areas are called "hot spots".
It is known to the inventor to machine a uniform cavity of shallow depth, such as 0.25 mm, on the surface of the CVD chuck in the area where a wafer is supported so the wafer touches only around the perimeter. This arrangement avoids hot spots except at the contact region around the periphery. It is also known to the inventor to conduct a gas such as argon into the space behind the wafer to improve the heat transfer from the chuck to the wafer across the shallow cavity. Non-uniform gas flow, however, still introduces non-uniformity in heating the wafer. The gas, for example, must spread radially and therefore pass through a larger and larger cross-sectional area, which introduces non-uniformity in pressure and density. It is also known to conduct an inert gas to the backside of a wafer without a shallow cavity behind the wafer. This method has been largely unsuccessful as well, for many of the same reasons as gas flow with a cavity behind the wafer.
In most cases, circuitry is formed on only one side of a wafer. The side not used for circuitry is called the backside of the wafer. In lithography procedures for defining patterns on deposited layers, the backside of a wafer is often used as a registering surface. For this and other reasons it is important that the backside of a wafer be kept smooth and clean, and that, in general, little or no material be deposited on the backside.
Another important characteristic in layering is that the deposited layers adhere well to the base wafer material or to the next underlying layer, so layered material doesn't flake or peel. The dimensions of structures and circuitry in integrated circuit technology are very small, so any unwanted flaking or peeling may easily spoil structures or circuitry. Also, flakes from a non-adherent layer may damage sensitive equipment and require cleaning of coating apparatus more often than would otherwise be necessary. The extra cleaning lowers production time.
Several techniques are used to enhance adhesion of layers deposited by CVD. One is to deposit a thin layer of a material known as an adhesion layer or a glue layer. The adhesion layer in some cases is an entirely different material known to adhere well to both the base material and to the new layer to be applied. For example, titanium is in some cases deposited by sputtering as an adhesion layer before depositing tungsten or a tungsten rich material, such as tungsten silicide, by CVD. Cleaning procedures, such as ion bombardment, are also used to prepare wafer surfaces to receive layers deposited by chemical vapor deposition.
It is usually desireable to do pretreatment steps and to deposit adhesion layers (if used) while a wafer is mounted in the same chamber and on the same apparatus that will be used to do the CVD. Otherwise the wafers to be coated have to be handled more often and mounted to and dismounted from different processing apparatus, which is time consuming and increases the chances of damage, error, and contamination. Since the wafers are typically mounted in the CVD chamber with the backside against a support, only the frontside is presented to process steps designed to enhance adhesion. If only the frontside is cleaned or otherwise treated, coating on the backside makes the possibility of edge peeling or flaking greater.
The fact of non-intimate contact between a wafer and the chuck, and the difficulty of making a seal that is impervious to gas between a wafer and a chuck leads to edge and backside coating problems. Also, because cleaning and other pre-treatment is usually effective only on the front surface, deposition on the edge and backside of a wafer is more likely to flake and peel.
Intrusion of deposition gases to the edge and the backside of a wafer presents another difficulty as well. This intrusion causes deposition on the chuck surface. This deposition, while it might represent a very small amount on the edge or backside of a wafer, is accumulative on the chuck surface. A new wafer is placed on the chuck for each deposition cycle, but the same chuck surface is coated time after time.
In the cases where a wafer rests directly on the chuck, even at the perimeter of the wafer only, an accumulation of deposited material over time can cause physical problems, such as flaking and improper seating of the wafer on the chuck. Another serious problem is that a coating deposited on the chuck will usually be a different material than the chuck, and will have a different emissivity than the chuck material. This can cause non-uniform radiant heating from the chuck to the wafer and result in non-uniform wafer temperature and subsequent non-uniform deposition thickness.
It is known to the inventor to limit backside and edge deposition by a perimeter wafer seal, including a proximity seal, during CVD processing. It is also known to combine the perimeter wafer seal and proximity seal with a flow of a non-reactive gas, such as nitrogen or argon, to the backside of the wafer, with or without a cavity behind the wafer on the chuck surface. All of the apparatus and methods known to the inventor prior to the present invention still have limitations in temperature uniformity and in limiting edge and backside deposition.
Another problem with CVD apparatus in general is efficient use of coating material. For example, in a CVD system with a heated central turret there is considerable exposure of heated turret area other than the area occupied by wafers to be coated. The result is use of coating gases to coat the turret, resulting in higher than necessary usage of coating gas material. For example, where tungsten hexafluoride is used, the gas is very highly purified and therefore expensive. Moreover, the excess coating causes particulate and cleaning problems. Even in systems with individual chucks it is difficult to heat only the surface occupied by a wafer, so there is still deposition on the chuck, wasting expensive gas and causing a particulate and cleaning problem.
In CVD processes it has quite recently become feasible to operate at much higher pressures than has been usual in the past. Higher total pressure for process gases can result in better hole filling efficiency and better step coverage than is possible at lower pressure. Hole filling efficiency refers to the relative ability to completely fill holes on a wafer surface without having a void. Step coverage refers to the relative ability to coat evenly on the walls of holes or other depressions on a wafer surface.
Higher coating pressure also promotes higher deposition rate, hence higher throughput of wafers for a CVD system. In processes where the typical total pressure has been in the past less than 1 Torr, processes are becoming feasible at 200 Torr and even higher pressures. At the higher pressures being used and contemplated, it is much more difficult to prevent edge and backside coating than is true at much lower total process pressure.
It is also true that efforts to prevent edge and backside coating by flowing non-reactive gas, such as argon, behind a wafer at the higher coating pressures being contemplated, such as 200 Torr and higher, may result in pressure differential across a wafer great enough to deform the wafer and cause even greater temperature non-uniformity and resulting thickness non-uniformity.
What is clearly needed is apparatus and methods for CVD processing to enhance temperature uniformity while reducing edge and backside coating still further over known apparatus and methods. Ideally such an apparatus and method will have low thermal mass, providing for quick reaction to change temperature. Also, the apparatus needs to be able to selectively heat a mounted wafer without heating other surfaces exposed to coating gas, so a minimum amount of excess coating will result. The apparatus needed also must be able to accomplish these advantages at total coating pressures very much higher than presently used for CVD processes.